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DC Field | Value | Language |
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dc.contributor.author | Mohamed, CHELIGHEM | - |
dc.contributor.author | Abd Elhakim Yakoub, CHAHED | - |
dc.contributor.author | Mansour, BOUZIDI | - |
dc.date.accessioned | 2018-07-01T09:49:07Z | - |
dc.date.available | 2018-07-01T09:49:07Z | - |
dc.date.issued | 2018-07-01 | - |
dc.identifier.uri | http://dspace.univ-ouargla.dz/jspui/handle/123456789/18291 | - |
dc.description | UNIVERSITÉ KASDI MERBAH DE OUARGLA FACULTÉ DES NOUVELLES TECHNOLOGIES DE L’INFORMATION ET DE LA COMMUNICATION DÉPARTEMENT D’ÉLECTRONIQUE ET DES TÉLÉCOMMUNICATIONS FILIÈRE: ELECTRONIQUE SPÉCIALITÉ: ELECTRONIQUE ET SYSTEM EMBARQUÉS | en_US |
dc.description.abstract | In inverter applications requiring medium to high power, the three-level diode clamped topology is a suitable way to achieve an enhanced quality of the output voltages and currents. This work presents an FPGA based implementation of space vector vector modulation for three-level diode clamped inverter. The three-level inverter using SVM control has superior performance though bringing about much computational complexity. Therefore, the XILINX Zynq 7000 FPGA-based implementation could solve this problem well. | en_US |
dc.language.iso | en | en_US |
dc.title | FPGA-based design and implementation of space vector modulation for three-phase three-level diode clamed inverter | en_US |
dc.type | Other | en_US |
Appears in Collections: | Département d'Electronique et des Télécommunications - Master |
Files in This Item:
File | Description | Size | Format | |
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CHELIGHEM,CHAHED.pdf | 798,31 kB | Adobe PDF | View/Open |
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